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CovR: Coverage-Aware Hardware Verification via Reasoning-Guided Reinforcement Learning

arXiv · AI, language, vision and robotics · article · Sep 15, 2026 · UTC

Design verification remains one of the most resource-intensive stages of hardware development, often consuming up to 70% of the total design effort. While recent work has explored using Large Language Models (LLMs) to automate testbench generation, most existing approaches focus narrowly on functional correctness, overlooking the critical aspect of coverage quality. To bridge this gap, we present CovR, an agentic framework for automated testbench generation that combines self-reflection loops with simulation-based feedback to maximize coverage. Using this pipeline, we construct a large-scale d

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